Digital Delay Generator / Pulse Generator
PCI-Card: BME_SG08p
6 Delays (SMB Output)
Delay-Resolution = 25ps
44 Bit Delayrange (max Delay = 429s)
very low Jitter
Max. Repetion Rate 15MHz
Gate or Pulse Output
Master/Slave Option
if more than 6 Outputs are needed
external/internal Trigger
external/internal Clock
Burst mode
Synchronuous Time Lists
for precision Timing with low Jitter
Circuit Description
The BME_SG08p is a PCI delay generator with 6 outputs generating signals delayed from 50nsec to 429sec, in steps of 25 picoseconds, with respect to a trigger event. The trigger event can be generated by an internal counter or by an external signal fed to the trigger input connector. The BME_SG08p can acheive repetition rates between 0.002Hz and 15MHz.
A trigger circuit starts the delay counters. There are 6 counters, A, B, C, D, E and F. Two different output modes can be selected: - Pulse-Mode: a delayed pulse of specified pulse-length - Gate-Mode: the outputs A and B can be combined to form a gate signal, i.e. a rising(falling) edge after delay A has elapsed and a falling(rising) edge after delay B has elapsed, so you get an pulse with a variable(25ps resolution) pulse-width from 2ns to 429s.
The BME_SG08p card synchronizes the delayed ouputs to an external trigger with an RMS Jitter of less than 250ps. An external clock can be fed to the external trigger input connector, which can additionally be gated and prescaled. If more than 6 outputs (or more than 3 gate output) are needed, two ore more cards can be slaved with a ribbon-cable, resulting in 12 or more synchronous delayed outputs.
Specifications
| Delays | Delayrange | 50ns - 429s (44bit) |
| Delayresolution | 25ps | |
| min. Dalaytime : | 50ns (Insertion-Delay) | |
| Error : | <(1ns + 25ppm * delay) )1 | |
| RMS Jitter: | Output to Output: <(50ps + 10-8 * delay) )1 Trigger to Output: <(250ps + 10-8 * delay) ) | |
| Trigger | External: | Threshold Range: -2.5V to 2.5V in Steps of 1.2mV |
| Slope : rising or falling edge | ||
| Input impedance : 10kR or 50R | ||
| Internal: | by a modulo-N counter running with the main clock | |
| Repetition Rate : 0.002Hz - 15MHz | ||
| Outputs A,B,C,D,E,F | Mode : | Pulse or Gate (AB), (CD), (EF) output |
| Load : | 50R or 25R, | |
| Risetime : | <1.2ns for TTL, 5V (typical) | |
| Levels : | TTL: 0 to 5V normal or inverted | |
| General | Clock Source: | Internal: 80Mhz (160MHz) accuracy: 10ppm T.C.: <1ppm/°C )1 |
| External: max. 500MHz with prescaler | ||
| Interface : | PCI-Bus; signal compatibility 3.3V and 5V | |
| Interrupts : | can be fired with the finish of any of the delays A, B, C, D, E, F or after detection of a trigger event | |
| It is also possible to fire an interrupt with the main trigger of the delay generator(s), or after a fixed number of triggers has occurred. |
)1 Accuracy and Jitter depend on Clock Source (specs with 25ppm clock source) optional 1ppm clock source available
Software
C Library
Labview dll
Application: Laser Timing
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